Engineers reduce design cycle and prototyping costs by using Averna's cutting-edge solutions for hardware-in-the-loop (HIL) testing. These solutions reduce both development time and cost with high system performance, impeccable data integrity, and simplified system management features.

• Optimal performance
• Best scalability
• Superior reliability
• Lowest per-channel cost

Our HIL solutions are fully integrated and based on the scalable PXI platform, and they provide simultaneous I/O for a wide range of analog and digital signals interfaced with simulation models through low-latency reflective memory technology.

• High-performance I/O with modular architecture
• Integration with fault injection hardware
• Extensive feature set to create and log time-stamped ARINC data
• Flexible system configuration

Our HIL solutions are cost-smart and they give reliable leveraging to our AvDAS platform. AvDAS imports a prebuilt and well-tested set of features for task distribution to multiple computing nodes, for integration with simulation models, system configuration, and data management, as well as for excellent ARINC functionality.